TC35274 lsi equivalent, toshiba mpeg-4 video decoder lsi.
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A single-chip MPEG-4 video decoder LSI performs 15frames/sec of MPEG-4 video decoding with QCIF (176x144 pixels) at 30MHz clock frequency.
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A 4-Mbit embedded DRAM i.
such as H.263, are performed by using appropriate firmware. General host interface is adopted in order to support vario.
System Reset Input (Low Active). When the LSI is reset, this terminal has to be low for more than 16 clock cycles. When power on, the LSI has to be reset after PLL locked. It takes approximately 100us until the PLL locked. System Standby Input (High .
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